Summer Training Program on “VLSI Design”

Organizing by AIT, IP University in collaboration with SYNOPSYS
This program for one month is being offered by the AIT, IP University in association with SYNOPSYS on Synopsys Tools and technologies. Attending this course will help you to understand the concepts of VLSI Design, Fabrication technologies, layout designing and lot more!
1. Resource Pensions: Internal and external from Synopsys and experts from industry.
2. Course Content: Topic wise is attached in the schedule.
3. Fee and Mode of Payment: Participants are required to submit fees CASH with dully filled form or a demand draft of Rs.2000/- in favour of "Principal, AIT". The fees will not be refunded in case a selected participant does not attend the program. TA and DA will not be paid for the participants.
4. Certificate: All successfully completed participants will get the certificate jointly from AIT and SYNOSPSYS.
5. Last date of registration: On or before 04-06-2010. Few seats are available and the conformation of the registration is based on the First Come First Serve manner.
6. Who can attend the program: Students studying or completed B.Tech/ M.Tech ( ECE) (preferably B.Tech students who have completed four semesters). Faculty members who are teaching (or willing to teach) VLSI Design can also attend)
. 7. Contact Person: For any enquires you can contact course coordinator in the following address:
Arun Kumar Saraswat
Ambedkar Institute of Technology,
Geeta Colony, East delhi ,
110031 Contact no: 09211671674
Email: arunkumarsaraswat@gmail.com